IC Design Flow Archives

Control Your IC Design Flow

John McGehee / Blognado, Chip Design / GNU Make, IC Design Flow / 0 Comments

August 8, 2009

Chip design is an iterative process. The design flow is run repeatedly as it is extended and refined into a program that can automatically build the entire chip. Your flow needs software to make sure that only the necessary steps are executed, in the correct order, on the correct data. Different hierarchical blocks must be constructed similarly, yet differently.

This is one of a series of articles on simple, specific techniques that will make your chip design flow easy to use. In this installment, I will explain how to control your chip design flow, and rules to keep it organized.More

Give Files in Your IC Design Flow Meaningful Names

John McGehee / Blognado, Chip Design, Linux, Windows / IC Design Flow / 0 Comments

May 25, 2009

When a user wants chip design data, a script or a log file, how do they find it? They look at the file and directory names. In fact, this may be the only documentation available.

As an IC design flow architect, proper file naming is the most important thing you can do to guide your users to the data they need. Further, you need to use safe names that can be used without transformation for any purpose, on any computing platform.More

Access Tcl Global Variables in an SDC File

John McGehee / Blognado, Chip Design / IC Design Flow, SDC, Tcl / 0 Comments

February 22, 2009

When you read an SDC file from the command line, it works fine. When you read it using a Tcl procedure, it won’t work, because the global variables cannot be accessed. Here’s how to fix this annoying problem.
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